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| Low Cost CMOS, High Speed, Rail-to-Rail Amplifiers ADA4891-1/ADA4891-2/ADA4891-3/ADA4891-4 FEATURES High speed and fast settling -3 dB bandwidth: 220 MHz (G = +1) Slew rate: 170 V/s Settling time to 0.1%: 28 ns Video specifications (G = +2, RL = 150 ) 0.1 dB gain flatness: 25 MHz Differential gain error: 0.05% Differential phase error: 0.25 Single-supply operation Wide supply range: 2.7 V to 5.5 V Output swings to within 50 mV of supply rails Low distortion: 79 dBc SFDR at 1 MHz Linear output current: 125 mA at -40 dBc Low power: 4.4 mA per amplifier CONNECTION DIAGRAMS ADA4891-1 NC 1 -IN 2 +IN 3 -VS 4 8 7 6 5 NC +VS OUT 08054-026 08054-001 NC NC = NO CONNECT Figure 1. 8-Lead SOIC_N (R-8) ADA4891-1 OUT 1 -VS 2 +IN 3 4 5 +VS -IN Figure 2. 5-Lead SOT-23 (RJ-5) APPLICATIONS Imaging Consumer video Active filters Coaxial cable drivers Clock buffers Photodiode preamp Contact image sensor and buffers OUT1 1 ADA4891-2 8 7 6 5 +VS OUT2 -IN2 08054-027 08054-074 -IN1 2 +IN1 3 -VS 4 +IN2 NC = NO CONNECT Figure 3. 8-Lead SOIC_N (R-8) and 8-Lead MSOP (RM-8) ADA4891-3 PD1 1 PD2 2 PD3 3 +VS 4 +IN1 5 -IN1 6 OUT1 7 14 13 12 11 10 9 8 GENERAL DESCRIPTION The ADA4891-1 (single), ADA4891-2 (dual), ADA4891-3 (triple), and ADA4891-4 (quad) are CMOS, high speed amplifiers that offer high performance at a low cost. The amplifiers feature true single-supply capability, with an input voltage range that extends 300 mV below the negative rail. In spite of their low cost, the ADA4891 family provides high performance and versatility. The rail-to-rail output stage enables the output to swing to within 50 mV of each rail, enabling maximum dynamic range. The ADA4891 family of amplifiers is ideal for imaging applications, such as consumer video, CCD buffers, and contact image sensor and buffers. Low distortion and fast settling time also make them ideal for active filter applications. The ADA4891-1/ADA4891-2/ADA4891-3/ADA4891-4 are available in a wide variety of packages. The ADA4891-1 is available in 8-lead SOIC and 5-lead SOT-23 packages. The ADA4891-2 is available in 8-lead SOIC and 8-lead MSOP packages. The ADA4891-3 and ADA4891-4 are available in 14-lead SOIC and 14-lead TSSOP packages. The amplifiers are specified to operate over the extended temperature range of -40C to +125C. Rev. B Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. OUT2 -IN2 +IN2 -VS +IN3 -IN3 OUT3 08054-073 Figure 4. 14-Lead SOIC_N (R-14) and 14-Lead TSSOP (RU-14) ADA4891-4 OUT1 1 -IN1 2 +IN1 3 +VS 4 +IN2 5 -IN2 6 OUT2 7 14 13 12 11 10 9 8 OUT4 -IN4 +IN4 -VS +IN3 -IN3 OUT3 Figure 5. 14-Lead SOIC_N (R-14) and 14-Lead TSSOP (RU-14) One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 (c)2010 Analog Devices, Inc. All rights reserved. ADA4891-1/ADA4891-2/ADA4891-3/ADA4891-4 TABLE OF CONTENTS Features .............................................................................................. 1 Applications ....................................................................................... 1 General Description ......................................................................... 1 Connection Diagrams ...................................................................... 1 Revision History ............................................................................... 2 Specifications..................................................................................... 3 5 V Operation ............................................................................... 3 3 V Operation ............................................................................... 4 Absolute Maximum Ratings............................................................ 6 Maximum Power Dissipation ..................................................... 6 ESD Caution .................................................................................. 6 Typical Performance Characteristics ............................................. 7 Applications Information .............................................................. 15 Using the ADA4891 ................................................................... 15 Wideband, Noninverting Gain Operation .............................. 15 Wideband, Inverting Gain Operation ..................................... 15 Recommended Values ............................................................... 15 Effect of RF on 0.1 dB Gain Flatness ........................................ 16 Driving Capacitive Loads .......................................................... 17 Terminating Unused Amplifiers .............................................. 18 Disable Feature (ADA4891-3 Only) ........................................ 18 Single-Supply Operation ........................................................... 18 Video Reconstruction Filter ...................................................... 19 Multiplexer .................................................................................. 19 Layout, Grounding, and Bypassing .............................................. 20 Power Supply Bypassing ............................................................ 20 Grounding ................................................................................... 20 Input and Output Capacitance ................................................. 20 Input-to-Output Coupling ........................................................ 20 Leakage Currents ........................................................................ 20 Outline Dimensions ....................................................................... 21 Ordering Guide .......................................................................... 23 REVISION HISTORY 7/10--Rev. A to Rev. B Added ADA4891-3 and ADA4891-4 ............................... Universal Added 14-Lead SOIC and 14-Lead TSSOP Packages .... Universal Deleted Figure 4; Renumbered Figures Sequentially ................... 1 Changes to Features Section and General Description Section . 1 Added Figure 4 and Figure 5 ........................................................... 1 Changes to Table 1 ............................................................................ 3 Changes to Table 2 ............................................................................ 4 Changes to Maximum Power Dissipation Section and Figure 6 ....................................................................................... 6 Added Table 4; Renumbered Tables Sequentially ........................ 6 Deleted Figure 11 .............................................................................. 6 Changes to Typical Performance Characteristics Section ........... 7 Deleted Figure 12 .............................................................................. 7 Changes to Wideband, Noninverting Gain Operation Section, Wideband, Inverting Gain Operation Section, and Table 5 ..... 15 Added Table 6.................................................................................. 16 Changes to Figure 52...................................................................... 16 Added Figure 53 ............................................................................. 16 Changed Layout of Driving Capacitive Loads Section.............. 17 Added Disable Feature (ADA4891-3 Only) Section and Single-Supply Operation Section .......................................... 18 Added Multiplexer Section ........................................................... 19 Updated Outline Dimensions ....................................................... 21 Changes to Ordering Guide .......................................................... 23 6/10--Rev. 0 to Rev. A Changes to Figure 26.........................................................................9 Changes to Figure 33 and Figure 34............................................. 10 Updated Outline Dimensions ....................................................... 18 Changes to Ordering Guide .......................................................... 18 2/10--Revision 0: Initial Version Rev. B | Page 2 of 24 ADA4891-1/ADA4891-2/ADA4891-3/ADA4891-4 SPECIFICATIONS 5 V OPERATION TA = 25C, VS = 5 V, RL = 1 k to 2.5 V, unless otherwise noted. All specifications are for the ADA4891-1, ADA4891-2, ADA4891-3, and ADA4891-4, unless otherwise noted. For the ADA4891-1 and ADA4891-2, RF = 604 ; for the ADA4891-3 and ADA4891-4, RF = 453 , unless otherwise noted. Table 1. Parameter DYNAMIC PERFORMANCE -3 dB Small-Signal Bandwidth Test Conditions/Comments ADA4891-1/ADA4891-2, G = +1, VO = 0.2 V p-p ADA4891-3/ADA4891-4, G = +1, VO = 0.2 V p-p ADA4891-1/ADA4891-2, G = +2, VO = 0.2 V p-p, RL = 150 to 2.5 V ADA4891-3/ADA4891-4, G = +2, VO = 0.2 V p-p, RL = 150 to 2.5 V ADA4891-1/ADA4891-2, G = +2, VO = 2 V p-p, RL = 150 to 2.5 V, RF = 604 ADA4891-3/ADA4891-4, G = +2, VO = 2 V p-p, RL = 150 to 2.5 V, RF = 374 G = +2, VO = 2 V step, 10% to 90% G = +2, VO = 2 V p-p, RL = 150 G = +2, VO = 2 V step fC = 1 MHz, VO = 2 V p-p, G = +1 fC = 1 MHz, VO = 2 V p-p, G = -1 f = 1 MHz G = +2, RL = 150 to 2.5 V G = +2, RL = 150 to 2.5 V f = 5 MHz, G = +2, VO = 2 V p-p Min Typ 240 220 90 96 25 25 170/210 40 28 -79/-93 -75/-91 9 0.05 0.25 -80 2.5 3.1 6 +2 83 71 5 3.2 -VS - 0.3 to +VS - 0.8 88 0.01 to 4.98 0.08 to 4.90 125 205 307 ADA4891-3 only Part enabled Part powered down Rev. B | Page 3 of 24 Max Unit MHz MHz MHz MHz MHz MHz V/s MHz ns dBc dBc nV/Hz % Degrees dB Bandwidth for 0.1 dB Gain Flatness Slew Rate, tR/tF -3 dB Large-Signal Frequency Response Settling Time to 0.1% NOISE/DISTORTION PERFORMANCE Harmonic Distortion, HD2/HD3 Input Voltage Noise Differential Gain Error (NTSC) Differential Phase Error (NTSC) All-Hostile Crosstalk DC PERFORMANCE Input Offset Voltage Offset Drift Input Bias Current Open-Loop Gain INPUT CHARACTERISTICS Input Resistance Input Capacitance Input Common-Mode Voltage Range Common-Mode Rejection Ratio (CMRR) OUTPUT CHARACTERISTICS Output Voltage Swing Output Current Short-Circuit Current Sourcing Sinking POWER-DOWN PINS (PD1, PD2, PD3) Threshold Voltage, VTH Bias Current 10 TMIN to TMAX -50 77 +50 RL = 1 k to 2.5 V RL = 150 to 2.5 V mV mV V/C pA dB dB G pF V dB V V mA mA mA V nA A VCM = 0 V to 3.0 V RL = 1 k to 2.5 V RL = 150 to 2.5 V 1% THD with 1 MHz, VO = 2 V p-p 2.4 65 -22 ADA4891-1/ADA4891-2/ADA4891-3/ADA4891-4 Parameter Turn-On Time Turn-Off Time POWER SUPPLY Operating Range Quiescent Current per Amplifier Supply Current When Powered Down Power Supply Rejection Ratio (PSRR) Positive PSRR Negative PSRR OPERATING TEMPERATURE RANGE Test Conditions/Comments Part enabled, output rises to 90% of final value Part powered down, output falls to 10% of final value Min Typ 166 49 Max Unit ns ns 2.7 ADA4891-3 only +VS = 5 V to 5.25 V, -VS = 0 V +VS = 5 V, -VS = -0.25 V to 0 V -40 4.4 0.8 65 63 5.5 V mA mA dB dB C +125 3 V OPERATION TA = 25C, VS = 3 V, RL = 1 k to 1.5 V, unless otherwise noted. All specifications are for the ADA4891-1, ADA4891-2, ADA4891-3, and ADA4891-4, unless otherwise noted. For the ADA4891-1 and ADA4891-2, RF = 604 ; for the ADA4891-3 and ADA4891-4, RF = 453 , unless otherwise noted. Table 2. Parameter DYNAMIC PERFORMANCE -3 dB Small-Signal Bandwidth Test Conditions/Comments ADA4891-1/ADA4891-2, G = +1, VO = 0.2 V p-p ADA4891-3/ADA4891-4, G = +1, VO = 0.2 V p-p ADA4891-1/ADA4891-2, G = +2, VO = 0.2 V p-p, RL = 150 to 1.5 V ADA4891-3/ADA4891-4, G = +2, VO = 0.2 V p-p, RL = 150 to 1.5 V ADA4891-1/ADA4891-2, G = +2, VO = 2 V p-p, RL = 150 to 1.5 V, RF = 604 ADA4891-3/ADA4891-4, G = +2, VO = 2 V p-p, RL = 150 to 1.5 V, RF = 374 G = +2, VO = 2 V step, 10% to 90% G = +2, VO = 2 V p-p, RL = 150 G = +2, VO = 2 V step fC = 1 MHz, VO = 2 V p-p, G = -1 f = 1 MHz G = +2, RL = 150 to 0.5 V, +VS = 2 V, -VS = -1 V G = +2, RL = 150 to 0.5 V, +VS = 2 V, -VS = -1 V f = 5 MHz, G = +2 Min Typ 190 175 75 80 18 18 140/230 40 30 -70/-89 9 0.23 0.77 -80 2.5 3.1 6 +2 76 65 5 3.2 -VS - 0.3 to +VS - 0.8 87 10 Max Unit MHz MHz MHz MHz MHz MHz V/s MHz ns dBc nV/Hz % Degrees dB mV mV V/C pA dB dB G pF V dB Bandwidth for 0.1 dB Gain Flatness Slew Rate, tR/tF -3 dB Large-Signal Frequency Response Settling Time to 0.1% NOISE/DISTORTION PERFORMANCE Harmonic Distortion, HD2/HD3 Input Voltage Noise Differential Gain Error (NTSC) Differential Phase Error (NTSC) All-Hostile Crosstalk DC PERFORMANCE Input Offset Voltage Offset Drift Input Bias Current Open-Loop Gain INPUT CHARACTERISTICS Input Resistance Input Capacitance Input Common-Mode Voltage Range Common-Mode Rejection Ratio (CMRR) TMIN to TMAX -50 72 +50 RL = 1 k to 1.5 V RL = 150 to 1.5 V VCM = 0 V to 1.5 V Rev. B | Page 4 of 24 ADA4891-1/ADA4891-2/ADA4891-3/ADA4891-4 Parameter OUTPUT CHARACTERISTICS Output Voltage Swing Output Current Short-Circuit Current Sourcing Sinking POWER-DOWN PINS (PD1, PD2, PD3) Threshold Voltage, VTH Bias Current Turn-On Time Turn-Off Time POWER SUPPLY Operating Range Quiescent Current per Amplifier Supply Current When Powered Down Power Supply Rejection Ratio (PSRR) Positive PSRR Negative PSRR OPERATING TEMPERATURE RANGE Test Conditions/Comments RL = 1 k to 1.5 V RL = 150 to 1.5 V 1% THD with 1 MHz, VO = 2 V p-p Min Typ 0.01 to 2.98 0.07 to 2.87 37 80 163 ADA4891-3 only Part enabled Part powered down Part enabled, output rises to 90% of final value Part powered down, output falls to 10% of final value 2.7 ADA4891-3 only +VS = 3 V to 3.15 V, -VS = 0 V +VS = 3 V, -VS = -0.15 V to 0 V -40 3.5 0.73 76 72 +125 1.3 48 -13 185 58 V nA A ns ns Max Unit V V mA mA mA 5.5 V mA mA dB dB C Rev. B | Page 5 of 24 ADA4891-1/ADA4891-2/ADA4891-3/ADA4891-4 ABSOLUTE MAXIMUM RATINGS Table 3. Parameter Supply Voltage Input Voltage (Common Mode) Differential Input Voltage Storage Temperature Range Operating Temperature Range Lead Temperature (Soldering, 10 sec) Rating 6V -VS - 0.5 V to +VS VS -65C to +125C -40C to +125C 300C To ensure proper operation, it is necessary to observe the maximum power derating curves shown in Figure 6. These curves are derived by setting TJ = 150C in Equation 1. Figure 6 shows the maximum safe power dissipation in the package vs. the ambient temperature on a JEDEC standard 4-layer board. 2.0 14-LEAD TSSOP TJ = 150C MAXIMUM POWER DISSIPATION (W) 1.5 8-LEAD SOIC_N Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. 1.0 8-LEAD MSOP 5-LEAD SOT-23 0.5 14-LEAD SOIC_N MAXIMUM POWER DISSIPATION The maximum power that can be safely dissipated by the ADA4891-1/ADA4891-2/ADA4891-3/ADA4891-4 is limited by the associated rise in junction temperature. The maximum safe junction temperature for plastic encapsulated devices is determined by the glass transition temperature of the plastic, approximately 150C. Temporarily exceeding this limit can cause a shift in parametric performance due to a change in the stresses exerted on the die by the package. Exceeding a junction temperature of 175C for an extended period can result in device failure. The still-air thermal properties of the package (JA), the ambient temperature (TA), and the total power dissipated in the package (PD) can be used to determine the junction temperature of the die. The junction temperature can be calculated as TJ = TA + (PD x JA) (1) -35 -15 5 25 45 65 85 105 125 AMBIENT TEMPERATURE (C) Figure 6. Maximum Power Dissipation vs. Ambient Temperature Table 4 lists the thermal resistance (JA) for each ADA4891-1/ ADA4891-2/ADA4891-3/ADA4891-4 package. Table 4. Package Type 5-Lead SOT-23 8-Lead SOIC_N 8-Lead MSOP 14-Lead SOIC_N 14-Lead TSSOP JA 146 115 133 162 108 Unit C/W C/W C/W C/W C/W ESD CAUTION The power dissipated in the package (PD) is the sum of the quiescent power dissipation and the power dissipated in the package due to the load drive for all outputs. It can be calculated by PD = (VT x IS) + (VS - VOUT) x (VOUT/RL) where: VT is the total supply rail. IS is the quiescent current. VS is the positive supply rail. VOUT is the output of the amplifier. RL is the output load of the amplifier. (2) Rev. B | Page 6 of 24 08054-002 0 -55 ADA4891-1/ADA4891-2/ADA4891-3/ADA4891-4 TYPICAL PERFORMANCE CHARACTERISTICS Unless otherwise noted, all plots are characterized for the ADA4891-1, ADA4891-2, ADA4891-3, and ADA4891-4. For the ADA4891-1 and ADA4891-2, the typical RF value is 604 . For the ADA4891-3 and ADA4891-4, the typical RF value is 453 . 4 3 5 4 NORMALIZED CLOSED-LOOP GAIN (dB) NORMALIZED CLOSED-LOOP GAIN (dB) 2 1 0 -1 -2 -3 -4 -5 -6 VS = 5V -8 VOUT = 200mV p-p RF = 604 -9 RL = 1k -10 0.1 1 G = +10 G = +5 G = -1 OR +2 G = +1 3 2 1 0 -1 -2 -3 -4 -5 -6 -7 -8 -9 -10 0.1 VS = 5V VOUT = 200mV p-p RF = 453 RL = 1k 1 G = +5 G = -1 OR +2 G = +1 -7 G = +10 FREQUENCY (MHz) 08054-028 10 100 1k 10 FREQUENCY (MHz) 100 1k Figure 7. Small-Signal Frequency Response vs. Gain, VS = 5 V, ADA4891-1/ADA4891-2 6 3 VS = 2.7V Figure 10. Small-Signal Frequency Response vs. Gain, VS = 5 V, ADA4891-3/ADA4891-4 6 3 VS = 2.7V VS = 3V VS = 3V CLOSED-LOOP GAIN (dB) 0 VS = 5V CLOSED-LOOP GAIN (dB) 0 -3 -6 -9 -12 -15 0.1 G = +1 VOUT = 200mV p-p RL = 1k 1 10 FREQUENCY (MHz) 100 VS = 5V -3 -6 -9 -12 -15 0.1 G = +1 VOUT = 200mV p-p RL = 1k 08054-029 1 10 FREQUENCY (MHz) 100 1k 1k Figure 8. Small-Signal Frequency Response vs. Supply Voltage, ADA4891-1/ADA4891-2 5 4 3 2 1 0 -1 -2 -3 -4 0.1 VS = 5V G = +1 VOUT = 200mV p-p RL = 1k 1 10 FREQUENCY (MHz) 100 1k 08054-030 Figure 11. Small-Signal Frequency Response vs. Supply Voltage, ADA4891-3/ADA4891-4 5 4 +125C +85C +25C 0C -40C +25C +125C 0C CLOSED-LOOP GAIN (dB) CLOSED-LOOP GAIN (dB) +85C 3 2 1 0 -1 -2 -3 -4 VS = 5V G = +1 VOUT = 200mV p-p RL = 1k 0.1 1 -40C 10 FREQUENCY (MHz) 100 1k Figure 9. Small-Signal Frequency Response vs. Temperature, VS = 5 V, ADA4891-1/ADA4891-2 Figure 12. Small-Signal Frequency Response vs. Temperature, VS = 5 V, ADA4891-3/ADA4891-4 Rev. B | Page 7 of 24 08054-078 08054-077 08054-076 ADA4891-1/ADA4891-2/ADA4891-3/ADA4891-4 7 6 5 +85C 0C +125C +25C 7 6 5 CLOSED-LOOP GAIN (dB) CLOSED-LOOP GAIN (dB) 4 3 2 1 0 -1 -2 -3 -4 -5 -6 0.1 VS = 3V G = +1 VOUT = 200mV p-p RL = 1k 4 3 2 1 0 -1 -2 -3 -4 -5 VS = 3V G = +1 VOUT = 200mV p-p RL = 1k 1 10 +85C +125C +25C 0C -40C -40C 08054-031 1 10 FREQUENCY (MHz) 100 1k 100 1k FREQUENCY (MHz) Figure 13. Small-Signal Frequency Response vs. Temperature, VS = 3 V, ADA4891-1/ADA4891-2 Figure 16. Small-Signal Frequency Response vs. Temperature, VS = 3 V, ADA4891-3/ADA4891-4 0.1 0.1 NORMALIZED CLOSED-LOOP GAIN (dB) NORMALIZED CLOSED-LOOP GAIN (dB) 0 VS = 3V VOUT = 2V p-p VS = 5V VOUT = 1.4V p-p -0.2 0 VS = 5V VOUT = 1.4V p-p -0.1 -0.1 -0.2 VS = 3V VOUT = 2V p-p VS = 5V VOUT = 2V p-p -0.3 VS = 5V VOUT = 2V p-p G = +2 RF = 604 RL = 150 0.1 1 -0.3 -0.4 08054-019 VS = 3V VOUT = 1.4V p-p 10 FREQUENCY (MHz) 100 1 10 FREQUENCY (MHz) 100 Figure 14. 0.1 dB Gain Flatness vs. Supply Voltage, G = +2, ADA4891-1/ADA4891-2 Figure 17. 0.1 dB Gain Flatness vs. Supply Voltage, G = +2, ADA4891-3/ADA4891-4 1 NORMALIZED CLOSED-LOOP GAIN (dB) NORMALIZED CLOSED-LOOP GAIN (dB) 1 0 -1 -2 -3 -4 -5 -6 -7 -8 -9 -10 0.1 VS = 5V RL = 150 VOUT = 2V p-p 1 G = +5 RF = 453 G = +1 RF = 0 G = -1 RF = 453 0 -1 -2 -3 -4 -5 -6 -7 -8 VS = 5V -9 RL = 150 VOUT = 2V p-p -10 0.1 1 G = +5 RF = 604 G = +2 RF = 604 G = +1 RF = 0 G = -1 RF = 604 G = +2 RF = 453 10 FREQUENCY (MHz) 100 1k 08054-081 10 FREQUENCY (MHz) 100 1k Figure 15. Large-Signal Frequency Response vs. Gain, VS = 5 V, ADA4891-1/ADA4891-2 08054-036 Figure 18. Large-Signal Frequency Response vs. Gain, VS = 5 V, ADA4891-3/ADA4891-4 Rev. B | Page 8 of 24 08054-080 -0.5 -0.4 G = +2 RF = 374 RL = 150 -0.5 0.1 VS = 3V VOUT = 1.4V p-p 08054-079 -6 0.1 ADA4891-1/ADA4891-2/ADA4891-3/ADA4891-4 1 G = -1 VOUT = 2V p-p NORMALIZED CLOSED-LOOP GAIN (dB) 1 0 -1 -2 -3 -4 -5 -6 -7 -8 -9 -10 0.1 VS = 3V RF = 453 RL = 150 1 10 FREQUENCY (MHz) 100 1k 08054-082 08054-041 08054-039 NORMALIZED CLOSED-LOOP GAIN (dB) 0 -1 -2 -3 -4 -5 -6 -7 -8 -9 -10 0.1 VS = 3V RF = 604 RL = 150 1 10 FREQUENCY (MHz) 100 1k 08054-037 G = +2 VOUT = 2V p-p G = -1 VOUT = 2V p-p G = +2 VOUT = 2V p-p G = +1 VOUT = 1V p-p G = +1 VOUT = 1V p-p G = +5 VOUT = 2V p-p G = +5 VOUT = 2V p-p Figure 19. Large-Signal Frequency Response vs. Gain, VS = 3 V, ADA4891-1/ADA4891-2 Figure 22. Large-Signal Frequency Response vs. Gain, VS = 3 V, ADA4891-3/ADA4891-4 -40 -50 -60 DISTORTION (dBc) VS = 5V RL = 1k VOUT = 2V p-p -30 G = +2 SECOND HARMONIC -40 VS = 3V RL = 1k VOUT = 2V p-p G = +1 THIRD HARMONIC G = +1 SECOND HARMONIC -70 -80 -90 -100 -110 -120 0.1 G = +1 SECOND HARMONIC DISTORTION (dBc) -50 -60 G = +2 SECOND HARMONIC +VS = +1.9V -70 OUT G = +2 THIRD HARMONIC IN 50 1k -VS = -1.1V G = +2 THIRD HARMONIC G = +1 THIRD HARMONIC 1 FREQUENCY (MHz) 10 08054-038 -80 -90 0.1 G = +1 CONFIGURATION 1 FREQUENCY (MHz) 10 Figure 20. Harmonic Distortion (HD2, HD3) vs. Frequency, VS = 5 V Figure 23. Harmonic Distortion (HD2, HD3) vs. Frequency, VS = 3 V -40 -50 -60 DISTORTION (dBc) VS = 5V RF = 604 RL = 1k fC = 1MHz G = -1 SECOND HARMONIC G = +1 SECOND HARMONIC -40 -50 -60 +VS = +1.9V G = -1 SECOND HARMONIC G = +1 CONFIGURATION OUT 1k -70 -80 -90 -100 -110 -120 DISTORTION (dBc) -70 -80 -90 -100 -110 -120 IN 50 -VS = -1.1V G = +1 THIRD HARMONIC G = -1 THIRD HARMONIC G = -1 THIRD HARMONIC G = +1 SECOND HARMONIC G = +1 THIRD HARMONIC 0 0.5 1.0 1.5 2.0 VS = 3V fC = 1MHz 2.5 3.0 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 OUTPUT VOLTAGE (V p-p) 08054-040 OUTPUT VOLTAGE (V p-p) Figure 21. Harmonic Distortion (HD2, HD3) vs. Output Voltage, VS = 5 V Figure 24. Harmonic Distortion (HD2, HD3) vs. Output Voltage, VS = 3 V Rev. B | Page 9 of 24 ADA4891-1/ADA4891-2/ADA4891-3/ADA4891-4 -40 G = +2 RF = 604 RL = 150 fC = 1MHz 1k VS = 3V SECOND HARMONIC VS = 3V THIRD HARMONIC -50 VOLTAGE NOISE (nV/ Hz) DISTORTION (dBc) -60 100 -70 VS = 5V SECOND HARMONIC VS = 5V THIRD HARMONIC -80 10 -90 VS = 5V G = +1 100 1k 10k 100k 1M 10M FREQUENCY (Hz) 08054-045 08054-083 08054-060 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 OUTPUT VOLTAGE (V p-p) Figure 25. Harmonic Distortion (HD2, HD3) vs. Output Voltage, G = +2 08054-042 -100 1 10 Figure 28. Input Voltage Noise vs. Frequency 90 80 70 -18 -36 DIFFERENTIAL GAIN ERROR (%) VS = 5V RL = 1k 0 0.06 0.04 0.02 0 -0.02 -0.04 -0.06 VS = 5V, G = +2 RF = 604, RL = 150 1ST 2ND 3RD 4TH 5TH 6TH 7TH 8TH 9TH 10TH OPEN-LOOP GAIN (dB) 60 50 40 30 20 10 0 -10 0.001 0.01 0.1 PHASE GAIN -54 -72 -90 -108 -126 -144 -162 1 10 100 08054-043 PHASE (Degrees) DIFFERENTIAL PHASE ERROR (Degrees) 0.3 0.2 0.1 0 -0.1 -0.2 -0.3 VS = 5V, G = +2 RF = 604, RL = 150 1ST 2ND 3RD 4TH 5TH 6TH 7TH 8TH MODULATING RAMP LEVEL (IRE) 9TH 10TH -180 1k FREQUENCY (MHz) Figure 26. Open-Loop Gain and Phase vs. Frequency Figure 29. Differential Gain and Phase Errors 7 7 NORMALIZED CLOSED-LOOP GAIN (dB) 5 4 3 2 1 0 -1 -2 -3 VS = 5V G = +2 RL = 150 VOUT = 200mV p-p 1 NORMALIZED CLOSED-LOOP GAIN (dB) 6 CL = 47pF CL = 22pF CL = 10pF 6 5 4 3 2 1 0 -1 -2 -3 VS = 5V G = +2 RL = 150 VOUT = 200mV p-p 1 10 FREQUENCY (MHz) 100 1k CL = 0pF CL = 22pF CL = 10pF CL = 47pF CL = 0pF 10 FREQUENCY (MHz) 100 1k Figure 27. Small-Signal Frequency Response vs. CL, ADA4891-1/ADA4891-2 08054-044 -4 0.1 -4 0.1 Figure 30. Small-Signal Frequency Response vs. CL, ADA4891-3/ADA4891-4 Rev. B | Page 10 of 24 ADA4891-1/ADA4891-2/ADA4891-3/ADA4891-4 100 VS = 5V G = +1 100k 10k OUTPUT IMPEDANCE () OUTPUT IMPEDANCE () 10 1k 1 100 0.1 10 VS = 5V G = +1 0.1 1 10 100 08054-046 0.1 1 10 100 FREQUENCY (MHz) FREQUENCY (MHz) Figure 31. Closed-Loop Output Impedance vs. Frequency, Part Enabled Figure 34. Closed-Loop Output Impedance vs. Frequency, Part Disabled (ADA4891-3 Only) VS = 3V G = +1 VOUT = 200mV p-p RL = 1k 1.5 VS = 5V RL = 1k VS = 5V RL = 150 G = +2 VOUT = 2V p-p 1.0 OUTPUT VOLTAGE (mV) 100 OUTPUT VOLTAGE (V) VS = 5V 0 0.5 VS = 3V RL = 150 VS = 3V RL = 1k 0 -0.5 -100 08054-048 -1.0 50mV/DIV 5ns/DIV 20 30 40 50 60 TIME (ns) 70 80 90 Figure 32. Small-Signal Step Response, G = +1 Figure 35. Large-Signal Step Response, G = +2 RL = 1k 1 OUTPUT VOLTAGE (V) VS = 5V G = +1 VOUT = 2V p-p RL = 1k 0.5 OUTPUT VOLTAGE (V) VS = 3V G = +1 VOUT = 1V p-p RL = 150 0 RL = 150 0 -1 08054-049 -0.5 0.5V/DIV 5ns/DIV 0.5V/DIV 5ns/DIV Figure 33. Large-Signal Step Response, VS = 5 V, G = +1 Figure 36. Large-Signal Step Response, VS = 3 V, G = +1 Rev. B | Page 11 of 24 08054-050 08054-047 -1.5 10 08054-089 0.01 0.01 1 0.01 ADA4891-1/ADA4891-2/ADA4891-3/ADA4891-4 0.30 VS = 5V G = +2 RL = 150 VOUT = 2V p-p 200 VS = 5V G = +2 RL = 150 FALLING EDGE 0.20 190 0 SLEW RATE (V/s) SETTLING (%) 0.10 180 170 -0.10 160 RISING EDGE -0.20 150 08054-061 0 25 30 TIME (ns) 35 40 45 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 OUTPUT STEP (V) Figure 37. Short-Term Settling Time to 0.1% Figure 40. Slew Rate vs. Output Step 3 INPUT 2 VS = 2.5V G = +1 RL = 1k 1 VS = 2.5V G = +1 RL = 1k INPUT OUTPUT 0 AMPLITUDE (V) AMPLITUDE (V) 1 -1 0 08054-071 -2 OUTPUT -1 1V/DIV 5ns/DIV -3 1V/DIV 5ns/DIV Figure 38. Input Overdrive Recovery from Positive Rail Figure 41. Input Overdrive Recovery from Negative Rail 3 OUTPUT 2 VS = 2.5V G = -2 RL = 1k 3 INPUT 2 VS = 2.5V G = -2 RL = 1k AMPLITUDE (V) 0 INPUT AMPLITUDE (V) 1 1 0 -1 -1 -2 1V/DIV -3 5ns/DIV 08054-070 -2 1V/DIV 5ns/DIV -3 Figure 39. Output Overdrive Recovery from Positive Rail Figure 42. Output Overdrive Recovery from Negative Rail Rev. B | Page 12 of 24 08054-052 OUTPUT 08054-063 08054-051 -0.30 140 1.0 ADA4891-1/ADA4891-2/ADA4891-3/ADA4891-4 -10 VS = 5V -20 -30 -30 ISOLATION (dB) CMRR (dB) 0 -10 -20 VS = 5V G = +2 RL = 150 -40 -50 -60 -70 -40 -50 -60 -70 -80 TSSOP SOIC -80 08054-090 -90 0.1 1 FREQUENCY (MHz) 10 100 1 10 FREQUENCY (MHz) 100 1k 08054-084 08054-057 -90 0.01 -100 0.1 Figure 43. CMRR vs. Frequency Figure 46. Forward Isolation vs. Frequency (ADA4891-3 Only) -10 -20 -30 PSRR (dB) Vs = 5V G = +1 OUTPUT SATURATION VOLTAGE (V) 1.0 VS = 5V 0.9 G = -2 RF = 604 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.1 VOH, +125C VOH, +25C VOH, -40C VOL, +125C VOL, +25C VOL, -40C -40 +PSRR -50 -60 -70 -80 0.01 -PSRR 08054-054 FREQUENCY (MHz) ILOAD (mA) Figure 44. PSRR vs. Frequency Figure 47. Output Saturation Voltage vs. Load Current and Temperature 0 -10 -20 -30 CROSSTALK (dB) QUIESCENT SUPPLY CURRENT (mA) Vs = 5V G = +2 RL = 1 k VOUT = 2V p-p 6.0 VS = 5V 5.5 5.0 -40 -50 -60 -70 -80 -90 1 10 FREQUENCY (MHz) 100 1k 08054-072 4.5 4.0 3.5 -100 0.1 3.0 -40 -20 0 20 40 60 80 100 120 TEMPERATURE (C) Figure 45. All-Hostile Crosstalk (Output-to-Output) vs. Frequency Figure 48. Supply Current per Amplifier vs. Temperature Rev. B | Page 13 of 24 08054-056 0.1 1 10 100 0 0 10 20 30 40 50 60 70 80 90 100 ADA4891-1/ADA4891-2/ADA4891-3/ADA4891-4 4.4 4.2 4.0 3.8 3.6 3.4 3.2 3.0 2.7 QUIESCENT SUPPLY CURRENT (mA) 3.0 3.3 3.6 3.9 4.2 4.5 4.8 SUPPLY VOLTAGE (V) Figure 49. Supply Current per Amplifier vs. Supply Voltage 08054-058 Rev. B | Page 14 of 24 ADA4891-1/ADA4891-2/ADA4891-3/ADA4891-4 APPLICATIONS INFORMATION USING THE ADA4891 Understanding the subtleties of the ADA4891 family of amplifiers provides insight into how to extract the peak performance from the device. The following sections describe the effect of gain, component values, and parasitics on the performance of the ADA4891. The wideband, noninverting gain configuration of the ADA4891 is shown in Figure 50; the wideband, inverting gain configuration of the ADA4891 is shown in Figure 51. WIDEBAND, INVERTING GAIN OPERATION +VS 0.1F 10F ADA4891 50 SOURCE VI VO RL WIDEBAND, NONINVERTING GAIN OPERATION +VS 0.1F 50 SOURCE VI RT VO RL RF RG 0.1F 10F 08054-023 RG RT RF 0.1F 10F -VS 10F 08054-024 Figure 51. Inverting Gain Configuration ADA4891 Figure 51 shows the inverting gain configuration. For the inverting gain configuration, set the parallel combination of RT and RG to match the input source impedance. Note that a bias current cancellation resistor is not required in the noninverting input of the amplifier because the input bias current of the ADA4891 is very low (less than 2 pA). Therefore, the dc errors caused by the bias current are negligible. For both noninverting and inverting gain configurations, it is often useful to increase the RF value to decrease the load on the output. Increasing the RF value improves harmonic distortion at the expense of reducing the 0.1 dB bandwidth of the amplifier. This effect is discussed further in the Effect of RF on 0.1 dB Gain Flatness section. -VS Figure 50. Noninverting Gain Configuration In Figure 50, RF and RG denote the feedback and gain resistors, respectively. Together, RF and RG determine the noise gain of the amplifier. The value of RF defines the 0.1 dB bandwidth (for more information, see the Effect of RF on 0.1 dB Gain Flatness section). Typical RF values range from 549 to 698 for the ADA4891-1/ADA4891-2. Typical RF values range from 301 to 453 for the ADA4891-3/ADA4891-4. In a controlled impedance signal path, RT is used as the input termination resistor designed to match the input source impedance. Note that RT is not required for normal operation. RT is generally set to match the input source impedance. RECOMMENDED VALUES Table 5 and Table 6 provide a quick reference for various configurations and show the effect of gain on the -3 dB small-signal bandwidth, slew rate, and peaking of the ADA4891-1/ADA4891-2/ ADA4891-3/ADA4891-4. Note that as the gain increases, the small-signal bandwidth decreases, as is expected from the gain bandwidth product relationship. In addition, the phase margin improves with higher gains, and the amplifier becomes more stable. As a result, the peaking in the frequency response is reduced (see Figure 7 and Figure 10). Table 5. Recommended Component Values and Effect of Gain on ADA4891-1/ADA4891-2 Performance (RL = 1 k) Gain -1 +1 +2 +5 +10 Feedback Network Values RF () RG () 604 604 0 Open 604 604 604 151 604 67.1 -3 dB Small-Signal Bandwidth (MHz) VOUT = 200 mV p-p 118 240 120 32.5 12.7 tR 188 154 170 149 71 Slew Rate (V/s) tF 192 263 210 154 72 Peaking (dB) 1.3 2.6 1.4 0 0 Rev. B | Page 15 of 24 ADA4891-1/ADA4891-2/ADA4891-3/ADA4891-4 Table 6. Recommended Component Values and Effect of Gain on ADA4891-3/ADA4891-4 Performance (RL = 1 k) Gain -1 +1 +2 +5 +10 Feedback Network Values RG () RF () 453 453 0 Open 453 453 453 90.6 453 45.3 -3 dB Small-Signal Bandwidth (MHz) VOUT = 200 mV p-p 97 220 97 31 13 0.3 tR 186 151 181 112 68 Slew Rate (V/s) tF 194 262 223 120 67 Peaking (dB) 0.9 4.1 0.9 0 0 EFFECT OF RF ON 0.1 dB GAIN FLATNESS Gain flatness is an important specification in video applications. It represents the maximum allowable deviation in the signal amplitude within the pass band. Tests have revealed that the human eye is unable to distinguish brightness variations of less than 1%, which translates into a 0.1 dB signal drop within the pass band or, put simply, 0.1 dB gain flatness. The PCB layout configuration and bond pads of the chip often contribute to stray capacitance. The stray capacitance at the inverting input forms a pole with the feedback and gain resistors. This additional pole adds phase shift and reduces phase margin in the closed-loop phase response, causing instability in the amplifier and peaking in the frequency response. Figure 52 and Figure 53 show the effect of using various values for Feedback Resistor RF on the 0.1 dB gain flatness of the parts. Figure 52 shows the effect for the ADA4891-1/ADA4891-2. Figure 53 show the effect for the ADA4891-3/ADA4891-4. Note that a larger RF value causes more peaking because the additional pole formed by RF and the input stray capacitance shifts down in frequency and interacts significantly with the internal poles of the amplifier. 0.2 RG = RF = 698 NORMALIZED CLOSED-LOOP GAIN (dB) 0.2 0.1 0 -0.1 -0.2 -0.3 -0.4 VS = 5V G = +2 VOUT = 2V p-p RL = 150 1 RG = RF = 402 RG = RF = 357 RG = RF = 453 RG = RF = 301 10 FREQUENCY (MHz) 100 Figure 53. 0.1 dB Gain Flatness, Noninverting Gain Configuration, ADA4891-3/ADA4891-4 To obtain the desired 0.1 dB bandwidth, adjust the feedback resistor, RF, as shown in Figure 52 and Figure 53. If RF cannot be adjusted, a small capacitor can be placed in parallel with RF to reduce peaking. The feedback capacitor, CF, forms a zero with the feedback resistor, which cancels out the pole formed by the input stray capacitance and the gain and feedback resistors. For a first pass in determining the CF value, use the following equation: RG x CS = RF x CF where: RG is the gain resistor. CS is the input stray capacitance. RF is the feedback resistor. CF is the feedback capacitor. Using this equation, the original closed-loop frequency response of the amplifier is restored, as if there is no stray input capacitance. Most often, however, the value of CF is determined empirically. NORMALIZED CLOSED-LOOP GAIN (dB) 0.1 RG = RF = 604 RG = RF = 649 0 RG = RF = 549 -0.1 -0.2 -0.3 1 10 FREQUENCY (MHz) 100 08054-022 -0.4 0.1 VS = 5V G = +2 VOUT = 2V p-p RL = 150 Figure 52. 0.1 dB Gain Flatness, Noninverting Gain Configuration, ADA4891-1/ADA4891-2 Figure 54 shows the effect of using various values for the feedback capacitor to reduce peaking. In this case, the ADA4891-1/ ADA4891-2 are used for demonstration purposes and RF = RG = 604 . The input stray capacitance, together with the board parasitics, is approximately 2 pF. Rev. B | Page 16 of 24 08054-085 -0.5 0.1 ADA4891-1/ADA4891-2/ADA4891-3/ADA4891-4 0.2 NORMALIZED CLOSED-LOOP GAIN (dB) CF = 0pF These four methods minimize the output capacitive loading effect. * * Reducing the output resistive load. This pushes the pole further away and, therefore, improves the phase margin. Increasing the phase margin with higher noise gains. As the closed-loop gain is increased, the larger phase margin allows for large capacitive loads with less peaking. Adding a parallel capacitor (CF) with RF, from -IN to the output. This adds a zero in the closed-loop frequency response, which tends to cancel out the pole formed by the capacitive load and the output impedance of the amplifier. See the Effect of RF on 0.1 dB Gain Flatness section for more information. Placing a small value resistor (RS) in series with the output to isolate the load capacitor from the output stage of the amplifier. 0.1 CF = 1pF 0 -0.1 CF = 3.3pF * -0.2 1 10 FREQUENCY (MHz) 100 08054-025 -0.3 0.1 VS = 5V G = +2 RF = 604 RL = 150 VOUT = 2V p-p * Figure 54. 0.1 dB Gain Flatness vs. CF, VS = 5 V, ADA4891-1/ADA4891-2 DRIVING CAPACITIVE LOADS A highly capacitive load reacts with the output impedance of the amplifiers, causing a loss of phase margin and subsequent peaking or even oscillation. The ADA4891-1/ADA4891-2 are used to demonstrate this effect (see Figure 55 and Figure 56). 8 6 4 Figure 57 shows the effect of using a snub resistor (RS) on reducing the peaking in the worst-case frequency response (gain of +1). Using RS = 100 reduces the peaking by 3 dB, with the trade-off that the closed-loop gain is reduced by 0.9 dB due to attenuation at the output. RS can be adjusted from 0 to 100 to maintain an acceptable level of peaking and closed-loop gain, as shown in Figure 57. 8 6 4 MAGNITUDE (dB) MAGNITUDE (dB) 2 0 -2 -4 -6 -8 VS = 5V VOUT = 200mV p-p G = +1 RL = 1k CL = 6.8pF 1 10 FREQUENCY (MHz) 100 08054-032 VS = 5V VOUT = 200mV p-p G = +1 RL = 1k CL = 6.8pF 2 0 -2 -4 -6 -8 VIN 200mV STEP RS RL 50 08054-033 RS = 0 RS = 100 OUT CL -10 0.1 Figure 55. Closed-Loop Frequency Response, CL = 6.8 pF, ADA4891-1/ADA4891-2 -10 0.1 1 10 FREQUENCY (MHz) 100 Figure 57. Closed-Loop Frequency Response with Snub Resistor, CL = 6.8 pF VS = 5V G = +1 RL = 1k CL = 6.8pF OUTPUT VOLTAGE (mV) Figure 58 shows that the transient response is also much improved by the snub resistor (RS = 100 ) compared to that of Figure 56. VS = 5V G = +1 RL = 1k CL = 6.8pF RS = 100 OUTPUT VOLTAGE (mV) 100 100 0 -100 0 08054-034 -100 50mV/DIV 50ns/DIV 50mV/DIV 50ns/DIV Figure 58. 200 mV Step Response, CL = 6.8 pF, RS = 100 Rev. B | Page 17 of 24 08054-035 Figure 56. 200 mV Step Response, CL = 6.8 pF, ADA4891-1/ADA4891-2 ADA4891-1/ADA4891-2/ADA4891-3/ADA4891-4 TERMINATING UNUSED AMPLIFIERS Terminating unused amplifiers in a multiamplifier package is an important step in ensuring proper operation of the functional amplifier. Unterminated amplifiers can oscillate and draw excessive power. The recommended procedure for terminating unused amplifiers is to connect any unused amplifiers in a unity-gain configuration and to connect the noninverting input to midsupply voltage. With symmetrical bipolar power supplies, this means connecting the noninverting input to ground, as shown in Figure 59. +VS SINGLE-SUPPLY OPERATION The ADA4891 can also be operated from a single power supply. Figure 61 shows the ADA4891-3 configured as a single 5 V supply video driver. * * * The input signal is ac-coupled into the amplifier via Capacitor C1. Resistor R2 and Resistor R4 establish the input midsupply reference for the amplifier. Capacitor C5 prevents constant current from being drawn through the gain set resistor (RG) and enables the ADA4891-3 at dc to provide unity gain to the input midsupply voltage, thereby establishing the output voltage at midsupply. Capacitor C6 is the output coupling capacitor. ADA4891 08054-064 * -VS Figure 59. Terminating Unused Amplifier with Symmetrical Bipolar Power Supplies The large-signal frequency response obtained with singlesupply operation is identical to the bipolar supply operation (Figure 18 shows the large-signal frequency response). Four pairs of low frequency poles are formed by R2/2 and C2, R3 and C1, RG and C5, and RL and C6. With this configuration, the -3 dB cutoff frequency at low frequency is 12 Hz. The values of C1, C2, C5, and C6 can be adjusted to change the low frequency -3 dB cutoff point to suit individual design needs. For more information about single-supply operation of op amps, see the Analog Dialogue article "Avoiding Op Amp Instability Problems in Single-Supply Applications" (Volume 35, Number 2) at www.analog.com. +5V C2 1F C3 10F In single power supply applications, a synthetic midsupply source must be created. This can be accomplished with a simple resistive voltage divider. Figure 60 shows the proper connection for terminating an unused amplifier in a single-supply configuration. +VS 2.5k 2.5k ADA4891 08054-065 Figure 60. Terminating Unused Amplifier with Single Power Supply +5V R2 50k R3 100k R4 50k C4 0.01F DISABLE FEATURE (ADA4891-3 ONLY) The ADA4891-3 includes a power-down feature that can be used to save power when an amplifier is not in use. When an amplifier is powered down, its output goes to a high impedance state. The output impedance decreases as frequency increases; this effect can be observed in Figure 34. With the power-down function, a forward isolation of -40 dB can be achieved at 50 MHz. Figure 46 shows the forward isolation vs. frequency data. The power-down feature is asserted by pulling the PD1, PD2, or PD3 pin low. Table 7 summarizes the operation of the power-down feature. Table 7. Disable Function Power-Down Pin Connection (PDx) >VTH or floating C6 22F VOUT RL 150 RG 453 C5 22F RF 453 C1 22F ADA4891-3 -VS 08054-086 Figure 61. Single-Supply Video Driver Schematic Rev. B | Page 18 of 24 ADA4891-1/ADA4891-2/ADA4891-3/ADA4891-4 VIDEO RECONSTRUCTION FILTER A common application for active filters is at the output of video digital-to-analog converters (DACs)/encoders. The filter, or more appropriately, the video reconstruction filter, is used at the output of a video DAC/encoder to eliminate the multiple images that are created during the sampling process within the DAC. For portable video applications, the ADA4891 is an ideal choice due to its lower power requirements and high performance. For active filters, a good rule of thumb is that the -3 dB bandwidth of the amplifiers be at least 10 times higher than the corner frequency of the filter. This ensures that no initial roll-off is introduced by the amplifier and that the pass band is flat until the cutoff frequency. An example of a 15 MHz, 3-pole, Sallen-Key, low-pass video reconstruction filter is shown in Figure 62. This circuit features a gain of +2, a 0.1 dB bandwidth of 7.3 MHz, and over 17 dB attenuation at 29.7 MHz (see Figure 63). The filter has three poles: two poles are active, with a third passive pole (R6 and C4) placed at the output. C3 improves the filter roll-off. R6, R7, and R8 make up the video load of 150 . Components R6, C4, R7, R8, and the input termination of the network analyzer form a 6 dB attenuator; therefore, the reference level is roughly 0 dB, as shown in Figure 63. C2 51pF R2 R3 47 125 VIN R1 C1 51pF R4 1k MULTIPLEXER The ADA4891-3 has a disable pin used to power down the amplifier to save power or to create a mux circuit. If two or more ADA4891-3 outputs are connected together and only one output is enabled, then only the signal of the enabled amplifier appears at the output. This configuration is used to select from various input signal sources. Additionally, the same input signal is applied to different gain stages, or differently tuned filters, to make a gain-step amplifier or a selectable frequency amplifier. Figure 64 shows a schematic of two ADA4891-3 devices used to create a mux that selects between two inputs. One input is a 1 V p-p, 3 MHz sine wave; the other input is a 2 V p-p, 1 MHz sine wave. +2.5V 0.1F 49.9 1V p-p 3MHz 10F ADA4891-3 0.1F -2.5V 453 +2.5V 0.1F 10F 49.9 453 VOUT 49.9 10F 49.9 +5V R6 6.8 R7 68.1 C4 1nF R8 75 VOUT 2V p-p 1MHz 49.9 ADA4891-3 0.1F -2.5V 10F 453 08054-062 SELECT Figure 62. 15 MHz Video Reconstruction Filter Schematic 0 -3 -6 -9 Figure 64. Two-to-One Multiplexer Using Two ADA4861-3 Devices The select signal and the output waveforms for this circuit are shown in Figure 65. 1V/DIV 1s/DIV MAGNITUDE (dB) -12 -15 -18 -21 -24 -27 -30 -33 -36 0.1 1 FREQUENCY (MHz) 10 100 08054-059 OUTPUT SELECT -39 0.03 5V/DIV 1s/DIV Figure 63. Video Reconstruction Filter Frequency Performance Figure 65. ADA4861-3 Mux Output Rev. B | Page 19 of 24 08054-088 08054-087 R5 1k C3 15pF 453 HCO4 ADA4891-1/ADA4891-2/ADA4891-3/ADA4891-4 LAYOUT, GROUNDING, AND BYPASSING POWER SUPPLY BYPASSING Power supply pins are additional op amp inputs, and care must be taken so that a noise-free, stable dc voltage is applied. The purpose of bypass capacitors is to create a low impedance path from the supply to ground over a range of frequencies, thereby shunting or filtering the majority of the noise to ground. Bypassing is also critical for stability, frequency response, distortion, and PSRR performance. If traces are used between components and the package, chip capacitors of 0.1 F (X7R or NPO) are critical and should be placed as close as possible to the amplifier package. The 0508 case size for such a capacitor is recommended because it offers low series inductance and excellent high frequency performance. Larger chip capacitors, such as 0.1 F capacitors, can be shared among a few closely spaced active components in the same signal path. A 10 F tantalum capacitor is less critical for high frequency bypassing, but it provides additional bypassing for lower frequencies. INPUT-TO-OUTPUT COUPLING To minimize capacitive coupling between the inputs and outputs and to avoid any positive feedback, the input and output signal traces should not be parallel. In addition, the input traces should not be close to each other. A minimum of 7 mils between the two inputs is recommended. LEAKAGE CURRENTS In extremely low input bias current amplifier applications, stray leakage current paths must be kept to a minimum. Any voltage differential between the amplifier inputs and nearby traces sets up a leakage path through the PCB. Consider a 1 V signal and 100 G to ground present at the input of the amplifier. The resultant leakage current is 10 pA; this is 5x the typical input bias current of the amplifier. Poor PCB layout, contamination, and the board material can create large leakage currents. Common contaminants on boards are skin oils, moisture, solder flux, and cleaning agents. Therefore, it is imperative that the board be thoroughly cleaned and that the board surface be free of contaminants to take full advantage of the low input bias currents of the ADA4891. To significantly reduce leakage paths, a guard ring/shield should be used around the inputs. The guard ring circles the input pins and is driven to the same potential as the input signal, thereby reducing the potential difference between pins. For the guard ring to be completely effective, it must be driven by a relatively low impedance source and should completely surround the input leads on all sides, above and below, using a multilayer board (see Figure 66). GUARD RING GROUNDING When possible, ground and power planes should be used. Ground and power planes reduce the resistance and inductance of the power supply feeds and ground returns. If multiple planes are used, they should be stitched together with multiple vias. The returns for the input, output terminations, bypass capacitors, and RG should all be kept as close to the ADA4891 as possible. Ground vias should be placed at the side or at the very end of the component mounting pads to provide a solid ground return. The output load ground and the bypass capacitor grounds should be returned to a common point on the ground plane to minimize parasitic inductance and to help improve distortion performance. INPUT AND OUTPUT CAPACITANCE Parasitic capacitance can cause peaking and instability and, therefore, should be minimized to ensure stable operation. High speed amplifiers are sensitive to parasitic capacitance between the inputs and ground. A few picofarads of capacitance reduce the input impedance at high frequencies, in turn increasing the gain of the amplifier and causing peaking of the frequency response or even oscillations, if severe enough. It is recommended that the external passive components that are connected to the input pins be placed as close as possible to the inputs to avoid parasitic capacitance. In addition, the ground and power planes under the pins of the ADA4891 should be cleared of copper to prevent parasitic capacitance between the input and output pins to ground. This is because a single mounting pad on a SOIC footprint can add as much as 0.2 pF of capacitance to ground if the ground or power plane is not cleared under the ADA4891 pins. In fact, the ground and power planes should be kept at a distance of at least 0.05 mm from the input pins on all layers of the board. Rev. B | Page 20 of 24 INVERTING NONINVERTING Figure 66. Guard Ring Configurations The 5-lead SOT-23 package for the ADA4891-1 presents a challenge in keeping the leakage paths to a minimum. The pin spacing is very tight, so extra care must be used when constructing the guard ring (see Figure 67 for the recommended guard ring construction). OUT -VS +IN -IN ADA4891-1 +VS OUT -VS +IN ADA4891-1 +VS -IN 08054-068 INVERTING NONINVERTING Figure 67. Guard Ring Layout, 5-Lead SOT-23 08054-067 GUARD RING ADA4891-1/ADA4891-2/ADA4891-3/ADA4891-4 OUTLINE DIMENSIONS 5.00 (0.1968) 4.80 (0.1890) 4.00 (0.1574) 3.80 (0.1497) 8 1 5 4 6.20 (0.2441) 5.80 (0.2284) 1.27 (0.0500) BSC 0.25 (0.0098) 0.10 (0.0040) COPLANARITY 0.10 SEATING PLANE 1.75 (0.0688) 1.35 (0.0532) 0.50 (0.0196) 0.25 (0.0099) 8 0 0.25 (0.0098) 0.17 (0.0067) 1.27 (0.0500) 0.40 (0.0157) 45 0.51 (0.0201) 0.31 (0.0122) COMPLIANT TO JEDEC STANDARDS MS-012-AA CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN. Figure 68. 8-Lead Standard Small Outline Package [SOIC_N] Narrow Body (R-8) Dimensions shown in millimeters and (inches) 3.00 2.90 2.80 1.70 1.60 1.50 5 4 3.00 2.80 2.60 1 2 3 0.95 BSC 1.90 BSC 1.30 1.15 0.90 1.45 MAX 0.95 MIN 0.20 MAX 0.08 MIN 10 5 0 0.55 0.45 0.35 121608-A 0.15 MAX 0.05 MIN 0.50 MAX 0.35 MIN SEATING PLANE 0.20 BSC COMPLIANT TO JEDEC STANDARDS MO-178-AA Figure 69. 5-Lead Small Outline Transistor Package [SOT-23] (RJ-5) Dimensions shown in millimeters Rev. B | Page 21 of 24 012407-A ADA4891-1/ADA4891-2/ADA4891-3/ADA4891-4 3.20 3.00 2.80 3.20 3.00 2.80 PIN 1 IDENTIFIER 8 5 1 5.15 4.90 4.65 4 0.65 BSC 0.95 0.85 0.75 0.15 0.05 COPLANARITY 0.10 0.40 0.25 15 MAX 1.10 MAX 0.23 0.09 0.80 0.55 0.40 100709-B 6 0 COMPLIANT TO JEDEC STANDARDS MO-187-AA Figure 70. 8-Lead Mini Small Outline Package [MSOP] (RM-8) Dimensions shown in millimeters 8.75 (0.3445) 8.55 (0.3366) 14 1 8 7 4.00 (0.1575) 3.80 (0.1496) 6.20 (0.2441) 5.80 (0.2283) 1.27 (0.0500) BSC 0.25 (0.0098) 0.10 (0.0039) COPLANARITY 0.10 0.51 (0.0201) 0.31 (0.0122) 1.75 (0.0689) 1.35 (0.0531) SEATING PLANE 0.50 (0.0197) 0.25 (0.0098) 8 0 0.25 (0.0098) 0.17 (0.0067) 1.27 (0.0500) 0.40 (0.0157) 45 COMPLIANT TO JEDEC STANDARDS MS-012-AB CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN. Figure 71. 14-Lead Standard Small Outline Package [SOIC_N] Narrow Body (R-14) Dimensions shown in millimeters and (inches) 5.10 5.00 4.90 14 8 4.50 4.40 4.30 1 7 6.40 BSC PIN 1 0.65 BSC 1.05 1.00 0.80 0.15 0.05 COPLANARITY 0.10 1.20 MAX 0.20 0.09 8 0 0.30 0.19 SEATING PLANE 0.75 0.60 0.45 061908-A COMPLIANT TO JEDEC STANDARDS MO-153-AB-1 Figure 72. 14-Lead Thin Shrink Small Outline Package [TSSOP] (RU-14) Dimensions shown in millimeters Rev. B | Page 22 of 24 060606-A ADA4891-1/ADA4891-2/ADA4891-3/ADA4891-4 ORDERING GUIDE Model 1 ADA4891-1ARZ ADA4891-1ARZ-RL ADA4891-1ARZ-R7 ADA4891-1ARJZ-R7 ADA4891-1ARJZ-RL ADA4891-2ARZ ADA4891-2ARZ-RL ADA4891-2ARZ-R7 ADA4891-2ARMZ ADA4891-2ARMZ-RL ADA4891-2ARMZ-R7 ADA4891-3ARUZ ADA4891-3ARUZ-R7 ADA4891-3ARUZ-RL ADA4891-3ARZ ADA4891-3ARZ-R7 ADA4891-3ARZ-RL ADA4891-4ARUZ ADA4891-4ARUZ-R7 ADA4891-4ARUZ-RL ADA4891-4ARZ ADA4891-4ARZ-R7 ADA4891-4ARZ-RL ADA4891-1AR-EBZ ADA4891-1ARJ-EBZ ADA4891-2AR-EBZ ADA4891-2ARM-EBZ ADA4891-3AR-EBZ ADA4891-3ARU-EBZ ADA4891-4AR-EBZ ADA4891-4ARU-EBZ 1 Temperature Range -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C Package Description 8-Lead SOIC_N 8-Lead SOIC_N, 13" Tape and Reel 8-Lead SOIC_N, 7" Tape and Reel 5-Lead SOT-23, 7" Tape and Reel 5-Lead SOT-23, 13" Tape and Reel 8-Lead SOIC_N 8-Lead SOIC_N, 13" Tape and Reel 8-Lead SOIC_N, 7" Tape and Reel 8-Lead MSOP 8-Lead MSOP, 13" Tape and Reel 8-Lead MSOP, 7" Tape and Reel 14-Lead TSSOP 14-Lead TSSOP, 7" Tape and Reel 14-Lead TSSOP, 13" Tape and Reel 14-Lead SOIC_N 14-Lead SOIC_N, 7" Tape and Reel 14-Lead SOIC_N, 13" Tape and Reel 14-Lead TSSOP 14-Lead TSSOP, 7" Tape and Reel 14-Lead TSSOP, 13" Tape and Reel 14-Lead SOIC_N 14-Lead SOIC_N, 7" Tape and Reel 14-Lead SOIC_N, 13" Tape and Reel Evaluation Board for 8-Lead SOIC_N Evaluation Board for 5-Lead SOT-23 Evaluation Board for 8-Lead SOIC_N Evaluation Board for 8-Lead MSOP Evaluation Board for 14-Lead SOIC_N Evaluation Board for 14-Lead TSSOP Evaluation Board for 14-Lead SOIC_N Evaluation Board for 14-Lead TSSOP Package Option R-8 R-8 R-8 RJ-5 RJ-5 R-8 R-8 R-8 RM-8 RM-8 RM-8 RU-14 RU-14 RU-14 R-14 R-14 R-14 RU-14 RU-14 RU-14 R-14 R-14 R-14 Branding H1W H1W H1U H1U H1U Z = RoHS Compliant Part. Rev. B | Page 23 of 24 ADA4891-1/ADA4891-2/ADA4891-3/ADA4891-4 NOTES (c)2010 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D08054-0-7/10(B) Rev. B | Page 24 of 24 |
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